Freescale Semiconductor Tower System Module S12G240 TWR-S12G240 TWR-S12G240 Ficha De Dados
Códigos do produto
TWR-S12G240
Port Integration Module (S12GPIMV1)
MC9S12G Family Reference Manual, Rev.1.23
Freescale Semiconductor
215
2.4.3.15
Port T Data Register (PTT)
2.4.3.16
Port T Input Register (PTIT)
Address 0x0240 (
,
)
Access: User read/write
1
1
Read: Anytime. The data source is depending on the data direction value.
Write: Anytime
Write: Anytime
7
6
5
4
3
2
1
0
R
PTT7
PTT6
PTT5
PTT4
PTT3
PTT2
PTT1
PTT0
W
Reset
0
0
0
0
0
0
0
0
Address 0x0240 (
)
Access: User read/write
7
6
5
4
3
2
1
0
R
0
0
PTT5
PTT4
PTT3
PTT2
PTT1
PTT0
W
Reset
0
0
0
0
0
0
0
0
Figure 2-16. Port T Data Register (PTT)
Table 2-35. PTT Register Field Descriptions
Field
Description
7-0
PTT
Port T general-purpose input/output data—Data Register
When not used with an alternative signal, the associated pin can be used as general-purpose I/O. In
general-purpose output mode the port data register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port data register bit, otherwise the
buffered pin input state is read.
When not used with an alternative signal, the associated pin can be used as general-purpose I/O. In
general-purpose output mode the port data register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port data register bit, otherwise the
buffered pin input state is read.
Address 0x0241 (
,
)
Access: User read only
1
1
Read: Anytime
Write:Never
Write:Never
7
6
5
4
3
2
1
0
R
PTIT7
PTIT6
PTIT5
PTIT4
PTIT3
PTIT2
PTIT1
PTIT0
W
Reset
0
0
0
0
0
0
0
0
Address 0x0241 (
)
Access: User read only
7
6
5
4
3
2
1
0
R
0
0
PTIT5
PTIT4
PTIT3
PTIT2
PTIT1
PTIT0
W
Reset
0
0
0
0
0
0
0
0
Figure 2-17. Port T Input Register (PTIT)