Renesas M32R-FPU Manual Do Utilizador

3

3-40

M32R-FPU Software Manual (Rev.1.01)

INSTRUCTIONS

3.2 Instruction description

Floating-point compare

Rdest = (comparison results of Rsrc1 and Rsrc2);

When at least one value, either Rsrc1 or Rsrc2, is QNaN or SNaN, a floating-point exception

(other than Invalid Operation Exception) occurs.

Compare the floating-point single precision values stored in Rsrc1 and Rsrc2 and store the

result in Rdest. The results of the comparison can be determined y the following methods.

Note: Only when EV bit (b21 of FPSR Register) = “0”.

The DN bit of FPSR handles the conversion of denormalized numbers. The condition bit (C)

remains unchanged.

Floating-Point Exceptions (FPE)

• Unimplemented Operation Exception (UIPL)

• Invalid Operation Exception (IVLD)

floating-point Instructions

Rdest

Comparison Results

Typical instructions used to 

determine comparison results

b0=0

   All bits, b1 to b31, are 0.

   Rsrc1=Rsrc2

   beqz   Rdest, LABEL

   bgtz   Rdest, LABEL

   bltz   Rdest, LABEL

   Rsrc1>Rsrc2

   Rsrc1<Rsrc2

   Comparison invalid

   Bits b1 to b31 are an undefined. 

   All others

   b1 to b9=111 1111 11,

   Bits b10 to b31 are an undefined.
   (Note)

b0=1