Renesas M32R-FPU Manual Do Utilizador

3

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M32R-FPU Software Manual (Rev.1.01)

INSTRUCTIONS

3.2 Instruction description

Floating-point divide

Rdest = Rsrc1 / Rsrc2 ;

Divide the floating-point single precision value stored in Rsrc1 by the floating-point single pre-

cision value stored in Rsrc1 and store the result in Rdest. The result is rounded according to the

RM field of FPSR. The DN bit of FPSR handles the modification of denormalized numbers. The

condition bit (C) remains unchanged.

Floating-Point Exceptions (FPE)

• Unimplemented Operation Exception (UIPL)

• Invalid Operation Exception (IVLD)

• Overflow (OVF)

• Underflow (UDF)

• Inexact Exception (IXCT)

• Zero Divide Exception (DIV0)

floating-point Instructions