Справочник Пользователя для Intel SE7520JR2
Intel® Server Board SE7520JR2
Platform Management
Revision 1.0
C78844-002
135
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SMBus data signal (SDAH)
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Optional SMBus alert signal (SMBAH). The signal notifies the host that the PC87431x has
data to provide.
data to provide.
When the system main power is off (PWRGD signal is low), the host interface signals are in
TRI-STATE to perform “passive” bus isolation between the mBMC SCLH, SDAH and SMBAH
signals and the SMBus controller signals. The passive bus isolation can be disabled by host
SMBus isolation control (offset 05h;) to support various system designs.
TRI-STATE to perform “passive” bus isolation between the mBMC SCLH, SDAH and SMBAH
signals and the SMBus controller signals. The passive bus isolation can be disabled by host
SMBus isolation control (offset 05h;) to support various system designs.
The mBMC is a slave device on the bus. The host interface is designed to support polled
operations. Host applications can optionally handle an SMBus alert interrupt, in case the mBMC
is unable to respond immediately to a host request. In this case, “Not Ready” is indicated in one
of two ways:
operations. Host applications can optionally handle an SMBus alert interrupt, in case the mBMC
is unable to respond immediately to a host request. In this case, “Not Ready” is indicated in one
of two ways:
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The host interface bandwidth is limited by the bus clock and mBMC latency. To meet the
device latency, the mBMC slows the bus periodically by extending the SMBus clock low
interval (SCLH). It is recommended to have a point-to-point connection between the host
and mBMC.
device latency, the mBMC slows the bus periodically by extending the SMBus clock low
interval (SCLH). It is recommended to have a point-to-point connection between the host
and mBMC.
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If the mBMC is in the middle of a LAN or peripheral device communication, or if a response
to the host request is not yet ready, the mBMC does not acknowledge the device address
(“NACK”). This forces the host software to stop and restart the session. The minimum
interval between two sessions should be 500 microseconds.
to the host request is not yet ready, the mBMC does not acknowledge the device address
(“NACK”). This forces the host software to stop and restart the session. The minimum
interval between two sessions should be 500 microseconds.
5.3.17.5 LAN
Interface
The IPMI Specification v1.5 defines how IPMI messages, encapsulated in RMCP packet format,
can be sent to and from the mBMC. This capability allows a remote console application to
access the mBMC and perform the following operations:
can be sent to and from the mBMC. This capability allows a remote console application to
access the mBMC and perform the following operations:
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Chassis Control, e.g., get chassis status, reset chassis, power-up chassis, power-down
chassis
chassis
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Get system sensor status
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Get and set system boot options
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Get Field Replaceable Unit (FRU) information
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Get System Event Log (SEL) entries
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Get Sensor Data Records (SDR)
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Set Platform Event Filtering (PEF)
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Set LAN configurations
In addition, the mBMC supports LAN alerting in the form of SNMP traps that conform to the IPMI
Platform Event Trap (PET) format.
Platform Event Trap (PET) format.
Table 53: LAN Channel Capacity
LAN Channel Capability
Options
Number of Sessions
1
Number of Users
1
User
Name NULL (anonymous)
User Password
Configurable