Справочник Пользователя для Intel SE7520JR2

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Functional Architecture 
Intel® Server Board SE7520JR2 
 
 
Revision 1.0 
C78844-002 
38 
X8, double row 
256MB 
512MB 
1GB 
2GB 
X4, single row 
256MB 
512MB 
1GB 
2GB 
X4, Stacked, double row 
512MB 
1GB 
2GB 
4GB 
 
DIMMs on channel ‘A’ are paired with DIMMs on channel ‘B’ to configure 2-way interleaving. 
Each DIMM pair is referred to as a bank. The bank can be further divided into two rows, based 
on single-sided or double-sided DIMMs. If both DIMMs in a bank are single-sided, only one row 
is said to be present. For double-sided DIMMs, both rows are said to be present. 
The Server Board SE7520JR2 has six DIMM slots, or three DIMM banks. Both DIMMs in a bank 
should be identical (same manufacturer, CAS latency, number of rows, columns and devices, 
timing parameters etc.). Although DIMMs within a bank must be identical, the BIOS supports 
various DIMM sizes and configurations allowing the banks of memory to be different. Memory 
sizing and configuration is guaranteed only for qualified DIMMs approved by Intel.  
 
Figure 5. Identifying Banks of Memory  
The BIOS reads the Serial Presence Detect (SPD) SEEPROMs on each installed memory 
module to determine the size and timing of the installed memory modules. The memory-sizing 
algorithm determines the size of each bank of DIMMs. The BIOS programs the Memory 
Controller in the chipset accordingly. The total amount of configured memory can be found 
using BIOS Setup. 
3.3.2 Memory 
Population 
Mixing of DDR-266 and DDR-333 DIMMs is supported between banks of memory. However, 
when mixing DIMM types, DDR-333 will run at DDR-266 speeds. 
1B
1A
2B
2A
3B
3A
Bank 1
Bank 2 
Bank 3 
 
MCH