Справочник Пользователя для Intel SE7520JR2
Intel® Server Board SE7520JR2
Functional Architecture
Revision 1.0
C78844-002
37
The ICH5-R supports slave functionality, including the Host Notify protocol. Hence, the host
controller supports eight command protocols of the SMBus interface: Quick Command, Send
Byte, Receive Byte, Write Byte/Word, Read Byte/Word, Process Call, Block Read/Write, and
Host Notify. See the System Management Bus (SMBus) Specification, Version 2.0 for more
information.
controller supports eight command protocols of the SMBus interface: Quick Command, Send
Byte, Receive Byte, Write Byte/Word, Read Byte/Word, Process Call, Block Read/Write, and
Host Notify. See the System Management Bus (SMBus) Specification, Version 2.0 for more
information.
3.3 Memory
Sub-System
The MCH provides an integrated memory controller for direct connection to two channels of
registered DDR-266, DDR-333 or DDR2-400 memory (stacked or unstacked). Peak theoretical
memory data bandwidth using DDR266 technology is 4.26 GB/s and 5.33 GB/S for DDR333
technology. For DDR2-400 technology, this increases to 6.4 GB/s
registered DDR-266, DDR-333 or DDR2-400 memory (stacked or unstacked). Peak theoretical
memory data bandwidth using DDR266 technology is 4.26 GB/s and 5.33 GB/S for DDR333
technology. For DDR2-400 technology, this increases to 6.4 GB/s
The MCH supports a burst length of four, whether in single or dual channel mode. In dual
channel mode this results in eight 64-bit chunks (64-byte cache line) from a single read or write.
In single channel mode, two reads or writes are required to access a cache line of data.
channel mode this results in eight 64-bit chunks (64-byte cache line) from a single read or write.
In single channel mode, two reads or writes are required to access a cache line of data.
3.3.1 Memory
Sizing
The memory controller is capable of supporting up to 4 loads per channel for DDR-333 and
DDR2-400. Memory technologies are classified as being either single rank or dual rank
depending on the number of DRAM devices that are used on any one DIMM. A single rank
DIMM is a single load device, ie) Single Rank = 1 Load. Dual rank DIMMs are dual load
devices, ie) Dual Rank = 2 loads.
DDR2-400. Memory technologies are classified as being either single rank or dual rank
depending on the number of DRAM devices that are used on any one DIMM. A single rank
DIMM is a single load device, ie) Single Rank = 1 Load. Dual rank DIMMs are dual load
devices, ie) Dual Rank = 2 loads.
The Server Board SE7520JR2 provides the following maximum memory capacities based on
the number of DIMM slots provided and maximum supported memory loads by the chipset:
the number of DIMM slots provided and maximum supported memory loads by the chipset:
•
24GB maximum capacity for DDR-266
•
16GB maximum capacity for DDR-333 and DDR2-400
The minimum memory supported with the system running in single channel memory mode is:
•
256MB for DDR-266, DDR-333 and DDR2-400
Supported DIMM capacities are as follows:
•
DDR-266 Memory DIMM sizes include: 256MB, 512MB, 1GB, 2GB, and 4GB.
•
DDR-333 Memory DIMM sizes include: 256MB, 512MB, 1GB, 2GB, and 4GB.
•
DDR2-400 Memory DIMM sizes include: 256MB, 512MB, 1GB, 2GB, and 4GB.
DIMM Module Capacities:
SDRAM Parts / SDRAM Technology Used
128Mb
256Mb
512Mb
1Gb
X8, single row
128MB
256MB
512MB
1GB