Справочник Пользователя для AMD LX 900@1.5W
128
AMD Geode™ LX Processors Data Book
CPU Core Register Descriptions
33234H
5.5.2.20 SMM Control MSR (SMM_CTL_MSR)
MSR Address
MSR Address
00001301h
Type
R/W
Reset Value
00000000_00000000h
SMM_CTL_MSR Register Map
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
RSVD
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
RSVD
SMI_EXTL
SM
I_
IO
SMI_INST
SMM_NEST
S
MM_
S
U
SP
SMM_NMI
SMM_CTL_MSR Bit Descriptions
Bit
Name
Description
63:6
RSVD (RO)
Reserved (Read Only).
5
SMI_EXTL
Enable External ASMI Pin. Enable external asynchronous SMIs.
0: Disable.
1: Enable.
1: Enable.
4
SMI_IO
Enable I/O Generated SMI. Enable SMIs caused by an I/O instruction.
0: Disable.
1: Enable.
1: Enable.
3
SMI_INST
Enable SMI Instructions. Enable SMI instructions: SMINT, RSM, SVDC, RSDC,
SVLDT, RSLDT, SVTS, RSTS. If not enabled, executing an SMI instruction causes an
invalid operation fault.
SVLDT, RSLDT, SVTS, RSTS. If not enabled, executing an SMI instruction causes an
invalid operation fault.
0: Disable.
1: Enable.
1: Enable.
2
SMM_NEST
Enable SMI Nesting. Enable non-software SMIs during SMM mode.
0: Disable.
1: Enable.
1: Enable.
1
SMM_SUSP
Enable Suspend during SMM. Enable Suspend during SMM mode.
0: Disable.
1: Enable.
1: Enable.
0
SMM_NMI
Enable Non-Maskable Interrupts during SMM. Enable NMI during SMM mode.
0: Disable.
1: Enable.
1: Enable.