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Chapter 4
Connecting Signals
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4-35
GPCTR0_GATE Signal
Any PFI pin can externally input the GPCTR0_GATE signal, which is
available as an output on the PFI9/GPCTR0_GATE pin.
available as an output on the PFI9/GPCTR0_GATE pin.
As an input, GPCTR0_GATE is configured in the edge-detection mode.
You can select any PFI pin as the source for GPCTR0_GATE and configure
the polarity selection for either rising or falling edge. You can use the gate
signal in a variety of different applications to perform actions such as
starting and stopping the counter, generating interrupts, saving the counter
contents, and so on.
You can select any PFI pin as the source for GPCTR0_GATE and configure
the polarity selection for either rising or falling edge. You can use the gate
signal in a variety of different applications to perform actions such as
starting and stopping the counter, generating interrupts, saving the counter
contents, and so on.
As an output, GPCTR0_GATE reflects the actual gate signal connected to
general-purpose counter 0, even if the gate is being externally generated by
another PFI. This output is set to high-impedance at startup.
general-purpose counter 0, even if the gate is being externally generated by
another PFI. This output is set to high-impedance at startup.
Figure 4-30 shows the timing requirements for GPCTR0_GATE.
Figure 4-30. GPCTR0_GATE Signal Timing in Edge-Detection Mode
GPCTR0_OUT Signal
This signal is available only as an output on the GPCTR0_OUT pin.
GPCTR0_OUT reflects the terminal count (TC) of general-purpose
counter 0. You have two software-selectable output options—pulse on TC
and toggle output polarity on TC. The output polarity is software-selectable
for both options. This output is set to high-impedance at startup.
Figure 4-31 shows the timing of GPCTR0_OUT.
GPCTR0_OUT reflects the terminal count (TC) of general-purpose
counter 0. You have two software-selectable output options—pulse on TC
and toggle output polarity on TC. The output polarity is software-selectable
for both options. This output is set to high-impedance at startup.
Figure 4-31 shows the timing of GPCTR0_OUT.
Note
When using external clocking mode with correlated DIO, this pin is used as an input
for the external clock.
Rising-Edge
Polarity
Falling-Edge
Polarity
t
w
= 10 ns minimum
t
w