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244

Datasheet, Volume 2

This register provides the refresh parameters.

This register provides the Refresh timing parameters. 

31:18

RO

0h

17:16

RW-L

00b

Uncore

Double Refresh Control (DOUBLE_REFRESH_CONTROL) 
This field will allow the double self refresh enable/disable. 
00 = Double refresh rate when DRAM is WARM/HOT.
01 = Force double self refresh regardless of temperature.
10 = Disable double self refresh regardless of temperature.
11 = Reserved 

15:12

RW-L

9h

Uncore

Refresh panic WM (Refresh_panic_wm)
tREFI count level in which the refresh priority is panic (default is 

9)
It is recommended to set the panic WM at least to 9, in order to 

use the maximum no-refresh period possible. 

11:8

RW-L

8h

Uncore

Refresh high priority WM (Refresh_HP_WM) 
tREFI count level that turns the refresh priority to high (default is 

8) 

7:0

RW-L

0Fh

Uncore

Rank idle timer for opportunistic refresh (OREF_RI) 
Rank idle period that defines an opportunity for refresh, in DCLK 

cycles 

31:25

RW-L

23h

Uncore

9 * tREFI 
Period of minimum between 9*tREFI and tRAS maximum 

(normally 70 us) in 1024 * DCLK cycles (default is 35h). 

24:16

RW-L

0B4h

Uncore

Refresh execution time (tRFC) 
Time of refresh – from beginning of refresh until next ACT or 

refresh is allowed (in DCLK cycles, default is 180h). 

15:0

RW-L

1004h

Uncore

tREFI period in DCLK cycles (tREFI) 
This field defines the average period between refreshes, and the 

rate that tREFI counter is incremented (in DCLK cycles, default is 

4100h).