Техническая Спецификация для Freescale Semiconductor MC56F8006 Demo board MC56F8006DEMO MC56F8006DEMO
Модели
MC56F8006DEMO
MC56F8006/MC56F8002 Digital Signal Controller, Rev. 4
Specifications
Freescale Semiconductor
64
Figure 35. Test Access Port Timing Diagram
8.13.5
Dual Timer Timing
Figure 36. Timer Timing
Table 33. Timer Timing
1, 2
1
In the formulas listed, T = the clock cycle. For 32 MHz operation, T = 31.25ns.
2. Parameters listed are guaranteed by design.
Characteristic
Symbol
Min
Max
Unit
See Figure
Timer input period
P
IN
2T + 6
—
ns
Timer input high/low period
P
INHL
1T + 3
—
ns
Timer output period
P
OUT
125
—
ns
Timer output high/low period
P
OUTHL
50
—
ns
Input Data Valid
Output Data Valid
t
DS
t
DH
t
DV
t
TS
TCK
(Input)
TDI
(Input)
TDO
(Output)
TDO
(Output)
TMS
P
OUT
P
OUTHL
P
OUTHL
P
IN
P
INHL
P
INHL
Timer Inputs
Timer Outputs