Nxp Semiconductors UM10237 用户手册

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页码 792
UM10237_2
© NXP B.V. 2008. All rights reserved.
User manual
Rev. 02 — 19 December 2008 
387 of 792
NXP Semiconductors
UM10237
Chapter 13: LPC24XX USB device controller
11. Both B_1 and B_2 are empty, and the active buffer is B_2.  The next packet written by 
software will go into B_2.
In DMA mode, switching of the active buffer is handled automatically in hardware.  For 
Bulk IN endpoints, proactively filling an endpoint buffer to take advantage of the double 
buffering can be accomplished by manually starting a packet transfer using the 
USBDMARSet register.
15.2 Isochronous endpoints
For isochronous endpoints, the active data buffer is switched by hardware when the 
FRAME interrupt occurs.  The SIE Clear Buffer and Validate Buffer commands do not 
cause the active buffer to be switched.
Double buffering allows the software to make full use of the frame interval writing or 
reading a packet to or from the active buffer, while the packet in the other buffer is being 
sent or received on the bus.
For an OUT isochronous endpoint, any data not read from the active buffer before the end 
of the frame is lost when it switches.
For an IN isochronous endpoint, if the active buffer is not validated before the end of the 
frame, an empty packet is sent on the bus when the active buffer is switched, and its 
contents will be overwritten when it becomes active again.