Motorola MCF5281 用户手册
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Chapter 6. ColdFire Flash Module (CFM)
6-7
Memory Map
31
30
29
28
27
26
25
24
23
22
21
20
19
18
16
Field BA31 BA30 BA29 BA28 BA27 BA26 BA25 BA24 BA23 BA22 BA21 BA20 BA19
—
Reset
0000_0000_0000_0000
R/W
R/W
15
9
8
7
6
5
4
3
2
1
0
Field
—
WP
—
C/I
SC
SD
UC
UD
V
Reset
0000_0001_0010_000
See
Note
R/W
R/W
R
R/W
R
R/W
Address
CPU + 0xC04
Note: The reset value for the valid bit is determined by the chip mode selected at reset (see Chapter 30, “Chip
Configuration Module (CCM)”).
Configuration Module (CCM)”).
Figure 6-3. Flash Base Address Register (FLASHBAR)
Table 6-2. FLASHBAR Field Descriptions
Bits
Name
Description
31–19
BA[31:18]
Base address field. Defines the 0-modulo-512K base address of the Flash module. By
programming this field, the Flash may be located on any 512Kbyte boundary within the
processor’s four gigabyte address space.
programming this field, the Flash may be located on any 512Kbyte boundary within the
processor’s four gigabyte address space.
18–9
—
Reserved, should be cleared.
8
WP
Write protect. Allows only read accesses to the Flash. When this bit is set, any attempted
write access will generate an access error exception to the ColdFire processor core.
0 Allows read and write accesses to the Flash module
1 Allows only read accesses to the Flash module
write access will generate an access error exception to the ColdFire processor core.
0 Allows read and write accesses to the Flash module
1 Allows only read accesses to the Flash module
7–6
—
Reserved, should be cleared.
5–1
C/I, SC, SD, UC,
UD
Address space masks (ASn).
These five bit fields allow certain types of accesses to be “masked,” or inhibited from
accessing the Flash module. The address space mask bits are:
These five bit fields allow certain types of accesses to be “masked,” or inhibited from
accessing the Flash module. The address space mask bits are:
C/I
CPU space/interrupt acknowledge cycle mask
SC
Supervisor code address space mask
SD
Supervisor data address space mask
UC User code address space mask
UD User data address space mask
UD User data address space mask
For each address space bit:
0 An access to the Flash module can occur for this address space
1 Disable this address space from the Flash module. If a reference using this address
0 An access to the Flash module can occur for this address space
1 Disable this address space from the Flash module. If a reference using this address
space is made, it is inhibited from accessing the Flash module, and is processed like any
other non-Flash reference.
other non-Flash reference.
These bits are useful for power management as detailed in Section 5.3.4, “Power
Management.””
Management.””
0
V
Valid. When set, this bit enables the Flash module; otherwise, the module is disabled.
0 Contents of FLASHBAR are not valid
1 Contents of FLASHBAR are valid
0 Contents of FLASHBAR are not valid
1 Contents of FLASHBAR are valid