Motorola MCF5281 用户手册
20-20
MCF5282 User’s Manual
MOTOROLA
Functional Description
To configure a pin for input capture:
1. Clear the pin’s IOS bit in GPTIOS.
2. Clear the pin’s DDR bit in PORTTnDDR.
3. Write to GPTCTL2 to select the input edge to detect.
2. Clear the pin’s DDR bit in PORTTnDDR.
3. Write to GPTCTL2 to select the input edge to detect.
PORTTnDDR does not affect the data direction of an output compare pin. The output
compare function overrides the data direction register but does not affect the state of the
data direction register.
compare function overrides the data direction register but does not affect the state of the
data direction register.
To configure a pin for output compare:
1. Set the pin’s IOS bit in GPTIOS.
2. Write the output compare value to GPTCn.
3. Clear the pin’s DDR bit in PORTTnDDR.
4. Write to the OMn/OLn bits in GPTCTL1 to select the output action.
2. Write the output compare value to GPTCn.
3. Clear the pin’s DDR bit in PORTTnDDR.
4. Write to the OMn/OLn bits in GPTCTL1 to select the output action.
Table 20-23 shows how various timer settings affect pin functionality.
Table 20-23. GPT Settings and Pin Functions
GPTEN DDR
1
GPTIOS
EDGx
[B:A]
OMx/
OLx
2
OC3Mx
3
Pin
Data
Dir.
Pin
Driven
by
Pin
Function
Comments
0
0
X
4
X
X
X
In
Ext.
Digital input
GPT disabled by GPTEN = 0
0
1
X
X
X
X
Out
Data reg.
Digital output
GPT disabled by GPTEN = 0
1
0
0 (IC)
0 (IC
disable
d)
X
0
In
Ext.
Digital input
Input capture disabled by EDGn
setting
setting
1
1
0
0
X
0
Out
Data reg.
Digital output
Input capture disabled by EDGn
setting
setting
1
0
0
<> 0
X
0
In
Ext.
IC and
digital input
Normal settings for input capture
1
1
0
<> 0
X
0
Out
Data reg.
Digital output
Input capture of data driven to output
pin by CPU
pin by CPU
1
0
0
<> 0
X
1
In
Ext.
IC and
digital input
OC3M setting has no effect because
IOS = 0
IOS = 0
1
1
0
<> 0
X
1
Out
Data reg.
Digital output
OC3M setting has no effect because
IOS = 0; input capture of data driven
to output pin by CPU
IOS = 0; input capture of data driven
to output pin by CPU
1
0
1 (OC)
X
(3)
0
5
0
In
Ext.
Digital input
Output compare takes place but
does not affect the pin because of
the OMn/OLn setting
does not affect the pin because of
the OMn/OLn setting
1
1
1
X
0
0
Out
Data reg.
Digital output
Output compare takes place but
does not affect the pin because of
the OMn/OLn setting
does not affect the pin because of
the OMn/OLn setting
1
0
1
X
<> 0
0
Out
OC action Output compare Pin readable only if DDR = 0
(5)