Motorola MCF5281 用户手册
MOTOROLA
Chapter 23. UART Modules
23-11
Register Descriptions
23.3.6 UART Receive Buffers (URBn)
The receive buffers contain one serial shift register and three receiver holding registers,
which act as a FIFO. RXD is connected to the serial shift register. The CPU reads from the
top of the stack while the receiver shifts and updates from the bottom when the shift register
is full (see Figure 23-19). RB contains the character in the receiver.
which act as a FIFO. RXD is connected to the serial shift register. The CPU reads from the
top of the stack while the receiver shifts and updates from the bottom when the shift register
is full (see Figure 23-19). RB contains the character in the receiver.
23.3.7 UART Transmit Buffers (UTBn)
The transmit buffers consist of the transmitter holding register and the transmitter shift
register. The holding register accepts characters from the bus master if channel’s
USRn[TxRDY] is set. A write to the transmit buffer clears USRn[TxRDY], inhibiting any
more characters until the shift register can accept more data. When the shift register is
empty, it checks if the holding register has a valid character to be sent (TxRDY = 0). If there
is a valid character, the shift register loads it and sets USRn[TxRDY] again. Writes to the
transmit buffer when the channel’s TxRDY = 0 and when the transmitter is disabled have
no effect on the transmit buffer.
register. The holding register accepts characters from the bus master if channel’s
USRn[TxRDY] is set. A write to the transmit buffer clears USRn[TxRDY], inhibiting any
more characters until the shift register can accept more data. When the shift register is
empty, it checks if the holding register has a valid character to be sent (TxRDY = 0). If there
is a valid character, the shift register loads it and sets USRn[TxRDY] again. Writes to the
transmit buffer when the channel’s TxRDY = 0 and when the transmitter is disabled have
no effect on the transmit buffer.
1–0
RC (This field selects a single command)
00
NO
ACTION
TAKEN
Causes the receiver to stay in its current mode. If the receiver is enabled, it remains
enabled; if disabled, it remains disabled.
enabled; if disabled, it remains disabled.
01
RECEIVER
ENABLE
If the UART module is not in multidrop mode (UMR1n[PM]
≠ 11),
RECEIVER
ENABLE
enables the channel's receiver and forces it into search-for-start-bit state. If the receiver is
already enabled, this command has no effect.
already enabled, this command has no effect.
10
RECEIVER
DISABLE
Disables the receiver immediately. Any character being received is lost. The command
does not affect receiver status bits or other control registers. If the UART module is
programmed for local loop-back or multidrop mode, the receiver operates even though this
command is selected. If the receiver is already disabled, the command has no effect.
does not affect receiver status bits or other control registers. If the UART module is
programmed for local loop-back or multidrop mode, the receiver operates even though this
command is selected. If the receiver is already disabled, the command has no effect.
11
—
Reserved, do not use.
7
0
Field
RB
Reset
1111_1111
R/W
Read only
Address
IPSBAR + 0x20C(URB0), 0x24C(URB1), 0x28C(URB2)
Figure 23-7. UART Receive Buffer (URBn)
Table 23-6. UCRn Field Descriptions (continued)
Bits
Value
Command
Description