Motorola MCF5281 用户手册

下载
页码 816
MOTOROLA
Chapter 30.  Chip Configuration Module (CCM)  
30-7
Memory Map and Registers
Table 30-6. RCSC Chip Select Configuration
Table 30-7. BOOTPS Port Size Configuration
6
RPLLREF
PLL reference. Reflects the default PLL reference when the PLL is enabled in normal PLL mode.
0 External clock is PLL reference
1 Crystal oscillator is PLL reference (This is the value used for the MCF5282.)
The default PLL reference can be overridden during reset configuration. If the default is overridden, 
the clock module’s SYNSR[PLLREF] reflects the PLL reference.
5
RLOAD
Pad driver load. Reflects the default pad driver strength configuration. 
0 Partial drive strength
1 Full drive strength (This is the value used for the MCF5282.)
4–3
BOOTPS
Boot port size. Reflects the default selection for the boot port size if the boot device is configured to be 
external. Table 30-7 shows the different port configurations for BOOTPS. The default function of the 
boot port size can be overridden during reset configuration.
2
BOOTSEL
Boot select. Reflects the default selection for the boot device.
0 Boot from internal boot device (This is the value used for the MCF5282.)
1 Boot from external boot device
1
Reserved, should be cleared.
0
MODE
Chip configuration mode. Reflects the default chip configuration mode.
0 Single-chip mode (This is the value used for the MCF5282.)
1 Master mode
The default mode can be overridden during reset configuration. If the default is overridden, the 
CCR[MODE0] reflects the mode configuration.
RCSC
Chip Select Configuration
00
 1
1
This is the value used for the MCF5282.
PF[7:5] = A[23:21]
01
PF[7] = CS6 / PF[6:5] = A[22:21]
10
PF[7:6] = CS6, CS5 / PF[5] = A[21]
11
PF[7:5] = CS6, CS5, CS4 
BOOTPS[1:0]
Boot Port Size
00
 1
1
This is the value used for the MCF5282.
Internal (32 bits)
01
16 bits
10
8 bits
11
32 bits
Table 30-5. RCON Field Descriptions (continued)
Bits
Name
Description