Motorola MVME2300 Series 用户手册
Programming Model
http://www.motorola.com/computer/literature
3-45
3
ROM A Base/Size Register
ROM A BASE
These control bits define the base address for ROM/Flash
Block A. ROM A BASE bits 0-11 correspond to
PowerPC 60x address bits 0 - 11 respectively. For larger
ROM/Flash sizes, the lower significant bits of ROM A
BASE are ignored. This means that the block’s base
address will always appear at an even multiple of its size.
ROM A BASE is initialized to $FF0 at power-up or local
bus reset.
Block A. ROM A BASE bits 0-11 correspond to
PowerPC 60x address bits 0 - 11 respectively. For larger
ROM/Flash sizes, the lower significant bits of ROM A
BASE are ignored. This means that the block’s base
address will always appear at an even multiple of its size.
ROM A BASE is initialized to $FF0 at power-up or local
bus reset.
Note that in addition to the programmed address, the first
1Mbyte of Block A also appears at $FFF00000 -
$FFFFFFFF if the rom_a_rv bit is set and the rom_b_rv
bit is cleared.
1Mbyte of Block A also appears at $FFF00000 -
$FFFFFFFF if the rom_a_rv bit is set and the rom_b_rv
bit is cleared.
Also note that the combination of ROM_A_BASE and
rom_a_siz should never be programmed such that
ROM/Flash Block A responds at the same address as the
CSR, DRAM, External Register set, or any other slave on
the PowerPC bus.
rom_a_siz should never be programmed such that
ROM/Flash Block A responds at the same address as the
CSR, DRAM, External Register set, or any other slave on
the PowerPC bus.
rom_a_64
rom_a_64 indicates the width of the ROM/Flash
device(s) being used for Block A. When rom_a_64 is
cleared, Block A is 16 bits wide, where each Falcon
interfaces to 8 bits. When rom_a_64 is set, Block A is 64
device(s) being used for Block A. When rom_a_64 is
cleared, Block A is 16 bits wide, where each Falcon
interfaces to 8 bits. When rom_a_64 is set, Block A is 64
Address
$FEF80050
Bit
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
Name
ROM A BASE
ro
m
_
a_
64
64
ro
m a s
iz0
ro
m a s
iz1
ro
m a s
iz2
0
0
0
0
0
ro
m
_
a_
rv
rv
ro
m a en
ro
m a w
e
Operation
READ/WRITE
R
R/
W
W
R/
W
W
R/
W
W
READ ZERO
R
R
R
R
R
R/
W
W
R/
W
W
R/
W
W
Reset
$FF0 PL
V P
0 PL
0 PL
0 PL
X
X
X
X
X
X
V P
0 PL
0 PL