National Instruments NI 5102 用户手册
Chapter 4
Hardware Overview
© National Instruments Corporation
4-9
Note
If Scan Clock is externally supplied, you must supply a free-running clock for proper
operation.
On the NI 5102 (ISA, PCMCIA, USB), data transfer takes place after an
acquisition ends, limiting the scan count to the size of the onboard memory.
acquisition ends, limiting the scan count to the size of the onboard memory.
On the NI 5102 (PCI, PXI), data can be moved very quickly from the
digitizer to host memory while an acquisition is in progress. The NI 5102
(PCI, PXI) takes advantage of the NI MITE on the application-specific
integrated circuit (ASIC) to master the PCI bus and transfer data acquired
on both channels to PC memory in real time without losing data. This
technology lets you acquire more data than 663,000 samples, the size of the
onboard memory. This property of the PCI bus extends the maximum scan
count to 16 million scans.
digitizer to host memory while an acquisition is in progress. The NI 5102
(PCI, PXI) takes advantage of the NI MITE on the application-specific
integrated circuit (ASIC) to master the PCI bus and transfer data acquired
on both channels to PC memory in real time without losing data. This
technology lets you acquire more data than 663,000 samples, the size of the
onboard memory. This property of the PCI bus extends the maximum scan
count to 16 million scans.
Figure 4-8 shows the timing signals involved in a posttrigger acquisition.
In this example, the hardware is programmed to acquire 10 posttriggered
scans.
In this example, the hardware is programmed to acquire 10 posttriggered
scans.
Figure 4-8. Posttrigger Acquisition
Table 4-4. Possible Number of Samples for Posttriggered Scans
Number
of
Channels
NI 5102 (PCI, PXI)
NI 5102 (ISA,
PCMCIA, USB)
Min
Max
Min
Max
One
1
16,777,088*
1
663,000
Two
1
16,777,088*
1
331,500
* Dependent on available memory
Start Trigger
Scan Clock
End of
Acquisition
Input
First Scan Clock Pulse
= Posttrigger Points