Intel Pentium M 730 RH80536GE0252M 用户手册

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THERMTRIP#

Output

Assertion of THERMTRIP# (Thermal Trip) indicates the processor junction 
temperature has reached a level beyond which permanent silicon damage may 
occur. Measurement of the temperature is accomplished through an internal 
thermal sensor which is configured to trip at approximately 135°C. Upon assertion 
of THERMTRIP#, the processor will shut off its internal clocks (thus halting program 
execution) in an attempt to reduce the processor junction temperature. To protect 
the processor, its core voltage (Vcc) must be removed following the assertion of 
THERMTRIP#. See 

 for the appropriate power down 

sequence and timing requirements.

For processors with CPUID of 0xF24:

Once activated, THERMTRIP# remains latched until RESET# is asserted. While 
the assertion of the RESET# signal will de-assert THERMTRIP#, if the processor’s 
junction temperature remains at or above the trip level, THERMTRIP# will again be 
asserted.

For processors with CPUID of 0xF27 or higher:

Driving of the THERMTRIP# signal is enabled within 10 us of the assertion of 
PWRGOOD and is disabled on de-assertion of PWRGOOD. Once activated, 
THERMTRIP# remains latched until PWRGOOD is de-asserted. While the de-
assertion of the PWRGOOD signal will de-assert THERMTRIP#, if the processor’s 
junction temperature remains at or above the trip level, THERMTRIP# will again be 
asserted within 10 us of the assertion of PWRGOOD.

TMS

Input

TMS (Test Mode Select) is a JTAG specification support signal used by debug 
tools.

TRDY#

Input

TRDY# (Target Ready) is asserted by the target to indicate that it is ready to receive 
a write or implicit writeback data transfer. TRDY# must connect the appropriate pins 
of all system bus agents.

TRST#

Input

TRST# (Test Reset) resets the Test Access Port (TAP) logic. TRST# must be driven 
low during power on Reset. This can be done with a 680 ohm pull-down resistor.

V

CCA

Input

V

CCA

 provides isolated power for the internal processor core PLL’s. Refer to the 

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 for complete implementation details.

V

CCIOPLL

Input

V

CCIOPLL

 

provides isolated power for internal processor system bus PLL’s. Follow the 

guidelines for V

CCA

, and refer to the Mobile Intel

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 for complete implementation 

details.

V

CCSENSE

Output

V

CCSENSE

 is an isolated low impedance connection to processor core power (V

CC

). It 

can be used to sense or measure power near the silicon with little noise.

VCCVID

Input

Independent 1.2-V supply must be routed to VCCVID pin for the Mobile Intel 
Pentium 4 Processor-M’s Voltage Identification circuit.

VID[4:0]

Output

VID[4:0] (Voltage ID) pins are used to support automatic selection of power supply 
voltages (Vcc). Unlike some previous generations of processors, these are open 
drain signals that are driven by the Mobile Intel Pentium 4 Processor-M and must 
be pulled up to 3.3 V (max.) with 1-Kohm resistors. The voltage supply for these 
pins must be valid before the VR can supply Vcc to the processor. Conversely, the 
VR output must be disabled until the voltage supply for the VID pins becomes valid. 
The VID pins are needed to support the processor voltage specification variations. 
See 

 for definitions of these pins. The VR must supply the voltage that is 

requested by the pins, or disable itself.

V

SSA

Input

V

SSA

 is the isolated ground for internal PLLs.

V

SSSENSE

Output

V

SSSENSE

 is an isolated low impedance connection to processor core V

SS

. It can be 

used to sense or measure ground near the silicon with little noise.