Intel 253668-032US User Manual
2-34 Vol. 3
SYSTEM ARCHITECTURE OVERVIEW
2.7.7.1
Reading and Writing Model-Specific Registers in 64-Bit Mode
RDMSR and WRMSR require an index to specify the address of an MSR. In 64-bit
mode, the index is 32 bits; it is specified using ECX.
mode, the index is 32 bits; it is specified using ECX.
2.7.8
Enabling Processor Extended States
The XSETBV instruction is required to enable OS support of individual processor
extended states in the XFEATURE_ENABLED_MASK register (see Section 2.6).
extended states in the XFEATURE_ENABLED_MASK register (see Section 2.6).