Intel 253668-032US User Manual
Vol. 3 3-1
CHAPTER 3
PROTECTED-MODE MEMORY MANAGEMENT
This chapter describes the Intel 64 and IA-32 architecture’s protected-mode memory
management facilities, including the physical memory requirements, segmentation
mechanism, and paging mechanism.
See also: Chapter 5, “Protection” (for a description of the processor’s protection
mechanism) and Chapter 17, “8086 Emulation” (for a description of memory
addressing protection in real-address and virtual-8086 modes).
management facilities, including the physical memory requirements, segmentation
mechanism, and paging mechanism.
See also: Chapter 5, “Protection” (for a description of the processor’s protection
mechanism) and Chapter 17, “8086 Emulation” (for a description of memory
addressing protection in real-address and virtual-8086 modes).
3.1 MEMORY
MANAGEMENT
OVERVIEW
The memory management facilities of the IA-32 architecture are divided into two
parts: segmentation and paging. Segmentation provides a mechanism of isolating
individual code, data, and stack modules so that multiple programs (or tasks) can
run on the same processor without interfering with one another. Paging provides a
mechanism for implementing a conventional demand-paged, virtual-memory system
where sections of a program’s execution environment are mapped into physical
memory as needed. Paging can also be used to provide isolation between multiple
tasks. When operating in protected mode, some form of segmentation must be used.
There is no mode bit to disable segmentation. The use of paging, however, is
optional.
These two mechanisms (segmentation and paging) can be configured to support
simple single-program (or single-task) systems, multitasking systems, or multiple-
processor systems that used shared memory.
As shown in Figure 3-1, segmentation provides a mechanism for dividing the
processor’s addressable memory space (called the linear address space) into
smaller protected address spaces called segments. Segments can be used to hold
the code, data, and stack for a program or to hold system data structures (such as a
TSS or LDT). If more than one program (or task) is running on a processor, each
program can be assigned its own set of segments. The processor then enforces the
boundaries between these segments and insures that one program does not interfere
with the execution of another program by writing into the other program’s segments.
The segmentation mechanism also allows typing of segments so that the operations
that may be performed on a particular type of segment can be restricted.
All the segments in a system are contained in the processor’s linear address space.
To locate a byte in a particular segment, a logical address (also called a far pointer)
must be provided. A logical address consists of a segment selector and an offset. The
segment selector is a unique identifier for a segment. Among other things it provides
an offset into a descriptor table (such as the global descriptor table, GDT) to a data
structure called a segment descriptor. Each segment has a segment descriptor, which
specifies the size of the segment, the access rights and privilege level for the
parts: segmentation and paging. Segmentation provides a mechanism of isolating
individual code, data, and stack modules so that multiple programs (or tasks) can
run on the same processor without interfering with one another. Paging provides a
mechanism for implementing a conventional demand-paged, virtual-memory system
where sections of a program’s execution environment are mapped into physical
memory as needed. Paging can also be used to provide isolation between multiple
tasks. When operating in protected mode, some form of segmentation must be used.
There is no mode bit to disable segmentation. The use of paging, however, is
optional.
These two mechanisms (segmentation and paging) can be configured to support
simple single-program (or single-task) systems, multitasking systems, or multiple-
processor systems that used shared memory.
As shown in Figure 3-1, segmentation provides a mechanism for dividing the
processor’s addressable memory space (called the linear address space) into
smaller protected address spaces called segments. Segments can be used to hold
the code, data, and stack for a program or to hold system data structures (such as a
TSS or LDT). If more than one program (or task) is running on a processor, each
program can be assigned its own set of segments. The processor then enforces the
boundaries between these segments and insures that one program does not interfere
with the execution of another program by writing into the other program’s segments.
The segmentation mechanism also allows typing of segments so that the operations
that may be performed on a particular type of segment can be restricted.
All the segments in a system are contained in the processor’s linear address space.
To locate a byte in a particular segment, a logical address (also called a far pointer)
must be provided. A logical address consists of a segment selector and an offset. The
segment selector is a unique identifier for a segment. Among other things it provides
an offset into a descriptor table (such as the global descriptor table, GDT) to a data
structure called a segment descriptor. Each segment has a segment descriptor, which
specifies the size of the segment, the access rights and privilege level for the