Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet

1009

SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]

11063K–ATARM–05-Nov-13

When an unspecified register access occurs, the URAD bit in the Interrupt Status Register (AES_ISR) raises. Its source
is then reported in the Unspecified Register Access Type field (URAT). Only the last unspecified register access is
available through the URAT field.

Several kinds of unspecified register accesses can occur:



Input Data Register written during the data processing when SMOD = IDATAR0_START



Output Data Register read during data processing



Mode Register written during data processing



Output Data Register read during sub-keys generation



Mode Register written during sub-keys generation



Write-only register read access

The URAD bit and the URAT field can only be reset by the SWRST bit in the AES_CR.