Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet

Product codes
AT91SAM9N12-EK
Page of 1104
174
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
21.5.5  Software Sequence to Detect the Presence of Fast Crystal
The frequency meter carried on CKGR_MCFR register is operating on the selected main clock and not on fast crystal
clock nor fast RC Oscillator clock.
Therefore, to check for the presence of a fast crystal clock, it is necessary to switch the main clock on fast crystal clock.
The following software sequence must be followed 
(during this sequence the Main RC oscillator must be kept
enabled (MOSCRCEN = 1))
:
MCK must select the slow clock (CSS=0 in PLL_MCKR register).
Wait for the MCKRDY flag in PLL_SR register to be 1.
The fast crystal must be enabled by programming 1 in MOSCXTEN field in CKGR_MOR register with MOSCXTST 
field being programmed to the appropriate value (see electrical characteristics chapter).
Wait for the MOSCXTS flag to be 1 in PLL_SR register to get the end of startup period of the fast crystal oscillator.
Then, MOSCSEL must be programmed to 1 in CKGR_MOR register to select fast main crystal oscillator for main 
clock.
The MOSCSEL must be read until its value equals 1.
Then MOSCSELS status flag must be checked in PLL_SR register.
At this point, 2 cases may occur (either MOSCSELS = 0 or MOSCSELS = 1). 
If MOSCSELS = 1, there is a valid crystal connected and its frequency can be determined by initiating a 
frequency measure by programming RCMEAS in CKGR_MCFR register.
If MOSCSELS = 0, there is no fast crystal clock (either no crystal connected or an out of specification crystal 
clock).
A frequency measure can reinforce this status by initiating a frequency measure by programming RCMEAS 
in CKGR_MCFR register.
If MOSCSELS = 0, the selection of the main clock must be programmed back to main RC oscillator by 
writing MOSCSEL to 0 prior to disable the fast crystal oscillator.
If MOSCSELS = 0, the crystal oscillator can be disabled (MOSCXTEN = 0 in CKGR_MOR register).
21.5.6  Main Clock Frequency Counter
The device features a Main Clock frequency counter that provides the frequency of the Main Clock. 
The Main Clock frequency counter is reset and starts incrementing at the Main Clock speed after the next rising edge of
the Slow Clock in the following cases:
when the 12 MHz Fast RC Oscillator clock is selected as the source of Main Clock and when this oscillator 
becomes stable (i.e., when the MOSCRCS bit is set)
when the 3 to 20 MHz Crystal Oscillator is selected as the source of Main Clock and when this oscillator becomes 
stable (i.e., when the MOSCXTS bit is set)
when the Main Clock Oscillator selection is modified
Then, at the 16th falling edge of Slow Clock, the MAINFRDY bit in the Clock Generator Main Clock Frequency Register
(CKGR_MCFR) is set and the counter stops counting. Its value can be read in the MAINF field of CKGR_MCFR and
gives the number of Main Clock cycles during 16 periods of Slow Clock, so that the frequency of the 12 MHz Fast RC
Oscillator or 3 to 20 MHz Crystal Oscillator can be determined.