Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet
Product codes
AT91SAM9N12-EK
321
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
27.8.2 16-bit LPDDR on EBI
27.8.2.1 Hardware Configuration
Figure 27-7. 16-bit LPDDR on EBI Configuration
27.8.2.2 Software Configuration
The following configuration has to be performed:
Assign EBI_CS1 to the DDR2 controller by setting the bit EBI_CS1A in the EBI Chip Select Register located in the
bus matrix memory space.
bus matrix memory space.
Initialize the DDR2 Controller depending on the LPDDR device and system bus frequency.
The LPDDR initialization sequence is described in the section “Low-power DDR1-SDRAM Initialization” in “DDR/SDR
SDRAM Controller (DDRSDRC)”.
SDRAM Controller (DDRSDRC)”.
In this case VDDNF can be different from VDDIOM. NAND Flash device can be 3.3V or 1.8V and wired on D16-D31 data
bus. NFD0_ON_D16 is to be set to 1.
bus. NFD0_ON_D16 is to be set to 1.