Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet
Product codes
AT91SAM9N12-EK
322
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
27.8.3 16-bit
SDRAM
27.8.3.1 Hardware Configuration
Figure 27-8. 16-bit SDRAM Configuration
27.8.3.2 Software Configuration
The following configuration has to be performed:
Assign the EBI CS1 to the SDRAM controller by setting the bit EBI_CS1A in the EBI Chip Select Assignment
Register located in the bus matrix memory space.
Register located in the bus matrix memory space.
Initialize the SDRAM Controller depending on the SDRAM device and system bus frequency.
The Data Bus Width is to be programmed to 16 bits.
The SDRAM initialization sequence is described in the section “SDRAM Device Initialization” in “SDRAM Controller
(SDRAMC)”.
(SDRAMC)”.
In this case VDDNF can be different from VDDIOM. NAND Flash device can be 3.3V or 1.8V and wired on D16-D31 data
bus. NFD0_ON_D16 is to be set to 1.
bus. NFD0_ON_D16 is to be set to 1.