Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet
Product codes
AT91SAM9N12-EK
375
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
30.8.2 Byte Write or Byte Select Access
Each chip select with a 16-bit or 32-bit data bus can operate with one of two different types of write access: byte write or
byte select access. This is controlled by the BAT field of the SMC_MODE register for the corresponding chip select.
byte select access. This is controlled by the BAT field of the SMC_MODE register for the corresponding chip select.
Figure 30-3. Memory Connection for an 8-bit Data Bus
Figure 30-4. Memory Connection for a 16-bit Data Bus
Figure 30-5. Memory Connection for a 32-bit Data Bus
SMC
A0
NWE
NRD
NCS[2]
A0
Write Enable
Output Enable
Memory Enable
D[7:0]
D[7:0]
A[18:2]
A[18:2]
A1
A1
SMC
NBS0
NWE
NRD
NCS[2]
Low Byte Enable
Write Enable
Output Enable
Memory Enable
NBS1
High Byte Enable
D[15:0]
D[15:0]
A[19:2]
A[18:1]
A[0]
A1
D[31:16]
SMC
NBS0
NWE
NRD
NCS[2]
NBS1
D[15:0]
A[20:2]
D[31:16]
NBS2
NBS3
Byte 0 Enable
Write Enable
Output Enable
Memory Enable
Byte 1 Enable
D[15:0]
A[18:0]
Byte 2 Enable
Byte 3 Enable