Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet

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SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]

11063K–ATARM–05-Nov-13

Byte write access supports one byte write signal per byte of the data bus and a single read signal.

Note that the SMC does not allow boot in Byte Write Access mode. 



For 16-bit devices: the SMC provides NWR0 and NWR1 write signals for respectively byte0 (lower byte) and byte1 
(upper byte) of a 16-bit bus. One single read signal (NRD) is provided. 

Byte Write Access is used to connect 2 x 8-bit devices as a 16-bit memory. 



For 32-bit devices: NWR0, NWR1, NWR2 and NWR3, are the write signals of byte0 (lower byte), byte1, byte2 and 
byte 3 (upper byte) respectively. One single read signal (NRD) is provided.

Byte Write Access is used to connect 4 x 8-bit devices as a 32-bit memory.

Byte Write option is illustrated on 

.

In this mode, read/write operations can be enabled/disabled at a byte level. One byte-select line per byte of the data bus
is provided. One NRD and one NWE signal control read and write.



For 16-bit devices: the SMC provides NBS0 and NBS1 selection signals for respectively byte0 (lower byte) and 
byte1 (upper byte) of a 16-bit bus. 

Byte Select Access is used to connect one 16-bit device.



For 32-bit devices: NBS0, NBS1, NBS2 and NBS3, are the selection signals of byte0 (lower byte), byte1, byte2 
and byte 3 (upper byte) respectively. Byte Select Access is used to connect two 16-bit devices.

 shows how to connect two 16-bit devices on a 32-bit data bus in Byte Select Access mode, on NCS3 (BAT =

Byte Select Access).

SMC

A1

NWR0

NRD

NCS[3]

Write Enable

Read Enable

Memory Enable

NWR1

Write Enable

Read Enable

Memory Enable

D[7:0]

D[7:0]

D[15:8]

D[15:8]

A[24:2]

A[23:1]

A[23:1]

A[0]

A[0]