Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet

Product codes
AT91SAM9N12-EK
Page of 1104
433
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
Figure 31-19. Self-refresh Mode Exit
Figure 31-20. Self-refresh and Automatic Update
NOP
VALID
NOP
0
TXNRD/TXSRD       (DDR device)
TXSR                       (Low-power DDR1 device)
TXSR                       (Low-power SDR, SDR-SDRAM device)
Exit Self Refresh mode
clock must be stable
before exiting self refresh mode
SDCLK
A[12:0]
COMMAND
CKE
BA[1:0]
DQS[1:0]
DaDb
D[15:0]
3
DM[1:0]
NOP
NOP
PRCHG
MRS
ARFSH
NOP
0
Tmrd
Enter Self Refresh
Mode
SDCLK
A[12:0] 
COMMAND
CKE
BA[1:0] 
2
NOP
Update Extended Mode 
register 
Trp
Pasr-Tcr-Ds