Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet
Product codes
AT91SAM9N12-EK
780
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
40.7.5.3 IrDA Demodulator
The demodulator is based on the IrDA Receive filter comprised of an 8-bit down counter which is loaded with the value
programmed in US_IF. When a falling edge is detected on the RXD pin, the Filter Counter starts counting down at the
Master Clock (MCK) speed. If a rising edge is detected on the RXD pin, the counter stops and is reloaded with US_IF. If
no rising edge is detected when the counter reaches 0, the input of the receiver is driven low during one bit time.
programmed in US_IF. When a falling edge is detected on the RXD pin, the Filter Counter starts counting down at the
Master Clock (MCK) speed. If a rising edge is detected on the RXD pin, the counter stops and is reloaded with US_IF. If
no rising edge is detected when the counter reaches 0, the input of the receiver is driven low during one bit time.
illustrates the operations of the IrDA demodulator.
Figure 40-34. IrDA Demodulator Operations
The programmed value in the US_IF register must always meet the following criteria:
t
MCK
* (IRDA_FILTER + 3) < 1.41 µs
As the IrDA mode uses the same logic as the ISO7816, note that the FI_DI_RATIO field in US_FIDI must be set to a
value higher than 0 in order to assure IrDA communications operate correctly.
value higher than 0 in order to assure IrDA communications operate correctly.
40.7.6 RS485
Mode
The USART features the RS485 mode to enable line driver control. While operating in RS485 mode, the USART
behaves as though in asynchronous or synchronous mode and configuration of all the parameters is possible. The
difference is that the RTS pin is driven high when the transmitter is operating. The behavior of the RTS pin is controlled
by the TXEMPTY bit. A typical connection of the USART to a RS485 bus is shown in
behaves as though in asynchronous or synchronous mode and configuration of all the parameters is possible. The
difference is that the RTS pin is driven high when the transmitter is operating. The behavior of the RTS pin is controlled
by the TXEMPTY bit. A typical connection of the USART to a RS485 bus is shown in
.
Figure 40-35. Typical Connection to a RS485 Bus
The USART is set in RS485 mode by writing the value 0x1 to the USART_MODE field in the Mode Register (US_MR).
The RTS pin is at a level inverse to the TXEMPTY bit. Significantly, the RTS pin remains high when a timeguard is
programmed so that the line can remain driven after the last character completion.
programmed so that the line can remain driven after the last character completion.
gives an example of the
RTS waveform during a character transmission when the timeguard is enabled.
MCK
RXD
Receiver
Input
Pulse
Rejected
6
5
4
3
2
6
1
6
5
4
3
2
0
Pulse
Accepted
Counter
Value
USART
RTS
TXD
RXD
Differential
Bus