Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK Data Sheet

Product codes
AT91SAM9M10-G45-EK
Page of 1361
 1000
SAM9M10 [DATASHEET]
6355F–ATARM–12-Mar-13
 
42.7.12
PWM  Channel  Counter  Register
Name:
 PWM_CCNT[0..3]
Addresses:
0xFFFB820C [0], 0xFFFB822C [1], 0xFFFB824C [2], 0xFFFB826C [3]
Access:
 Read-only
• CNT:  Channel  Counter  Register
Internal counter value. This register is reset when:
• the channel is enabled (writing CHIDx in the PWM_ENA register).
• the counter reaches CPRD value defined in the PWM_CPRDx register if the waveform is left aligned.
31
30
29
28
27
26
25
24
CNT
23
22
21
20
19
18
17
16
CNT
15
14
13
12
11
10
9
8
CNT
7
6
5
4
3
2
1
0
CNT