Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK Data Sheet
Product codes
AT91SAM9M10-G45-EK
998
SAM9M10 [DATASHEET]
6355F–ATARM–12-Mar-13
42.7.10
PWM Channel Duty Cycle Register
Name:
PWM_CDTY[0..3]
Addresses:
0xFFFB8204 [0], 0xFFFB8224 [1], 0xFFFB8244 [2], 0xFFFB8264 [3]
Access:
Read/Write
Only the first 16 bits (internal channel counter size) are significant.
• CDTY: Channel Duty Cycle
Defines the waveform duty cycle. This value must be defined between 0 and CPRD (PWM_CPRx).
31
30
29
28
27
26
25
24
CDTY
23
22
21
20
19
18
17
16
CDTY
15
14
13
12
11
10
9
8
CDTY
7
6
5
4
3
2
1
0
CDTY