Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
Datasheet
1065
15.7.26
iunit_IUNIT_AFE_HS_CONTROL_type
(IUNIT_AFE_HS_CONTROL)—Offset DCh
High-speed termination control MIPI CSI DPHY
Access Method
Default: 64000A00h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
SDRA
M_W
A
K
E
U
P_P
S
TA
T
E
DN
GT
Bit
Range
Default &
Access
Description
31:30
0h
RO
SDRAM_WAKEUP_PSTATE:
SDRAM_WAKEUP_PSTATE: State of the SDRAM_WAKEUP
state machine. 00b = State machine is idle; 01b = sdram_wakeup seen, waiting for all
memory transactions in flight to complete; 10b = All memory transactions are
completed, waiting for acknowledgement from czclk domain before returning to idle
state;
29:11
0h
RO
DN:
DN: Computed deadline value to be send with the next request on IB PFI bus. This
is the internal deadline value. The actual deadline that is sent on the IB PFI bus is the
maximum of GT+MDD or DN.
10:0
0h
RO
GT:
GT: Current value of Global Timer
Type:
PCI Configuration Register
(Size: 32 bits)
IUNIT_AFE_HS_CONTROL:
31
28
24
20
16
12
8
4
0
0 1 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0
HS_CLK_UN
G
A
T
E_DL
Y
RSVD_23_22
CSI3_C
LK
_HS_
T
E
RM_OVR
D
CSI2_C
LK
_HS_
T
E
RM_OVR
D
CSI1_C
LK
_HS_
T
E
RM_OVR
D
HS_C
LK
_EN_DL
Y
HS_DA
TA_EN_DL
Y