Intel E3815 FH8065301567411 Data Sheet

Product codes
FH8065301567411
Page of 5308
Intel
®
 Atom™ Processor E3800 Product Family
1558
Datasheet
15.8.652 reg_inp_sys_csi_receiver_csi_backend_comp_reg1_vc1_type 
(inp_sys_csi_receiver_csi_backend_comp_reg1_vc1)—Offset 
80154h
Compression scheme register 1 for virtual channel 1
Access Method
Default: 00000000h
24:23
0h
RW
pred_usd_type5: 
prediction algorithm for user defined type 5 data: 1 -) pred1, 2 -) 
pred2
22:20
0h
RW
comp_usd_type5: 
compression format for user defined type 5 data: value between 1 
to 6
19:18
0h
RW
pred_usd_type4: 
prediction algorithm for user defined type 4 data: 1 -) pred1, 2 -) 
pred2
17:15
0h
RW
comp_usd_type4: 
compression format for user defined type 4 data: value between 1 
to 6
14:13
0h
RW
pred_usd_type3: 
prediction algorithm for user defined type 3 data: 1 -) pred1, 2 -) 
pred2
12:10
0h
RW
comp_usd_type3: 
compression format for user defined type 3 data: value between 1 
to 6
9:8
0h
RW
pred_usd_type2: 
prediction algorithm for user defined type 2 data: 1 -) pred1, 2 -) 
pred2
7:5
0h
RW
comp_usd_type2: 
compression format for user defined type 2 data: value between 1 
to 6
4:3
0h
RW
pred_usd_type1: 
prediction algorithm for user defined type 1 data: 1 -) pred1, 2 -) 
pred2
2:0
0h
RW
comp_usd_type1: 
compression format for user defined type 1 data: value between 1 
to 6
Bit 
Range
Default & 
Access
Description
Type: 
Memory Mapped I/O Register
(Size: 32 bits)
inp_sys_csi_receiver_csi_backend_comp_reg1_vc1: 
ISPMMADR Type: 
PCI Configuration Register (Size: 32 bits)
ISPMMADR Reference: 
[B:0, D:3, F:0] + 10h