Intel E3815 FH8065301567411 Data Sheet

Product codes
FH8065301567411
Page of 5308
 
Electrical Specifications
Intel
®
 Atom™ Processor E3800 Product Family
Datasheet
157
NOTES:
1.
Frequency High limit = +300ppm; Low limit = -5300ppm
2.
Range: 0% ~ 0.5% when downspread enabled
3.
Range: 30 kHz ~33 kHz when downspread enabled.
4.
For High Bit Rate.
5.
For Reduced Bit Rate.
6.
At 20 to 80
7.
Total drive current of the transmitter when it is shorted to its ground.
8.
Informative. D+ rise to D- fall mismatch and D+ fall to D- rise mismatch.
T
TX-EYE_CHIP
_High_Rate
Minimum TX Eye Width at Tx package 
pins
0.72
UI
4
T
TX-EYE-MEDIAN-to- 
MAX-JITTER 
_CHIP__High_Rate
Maximum time between the jitter median 
and maximum deviation from the median 
at Tx package pins
0.147
UI
4
T
TX-EYE_CHIP
_Low_Rate
Minimum TX Eye Width at Tx package 
pins
0.82
UI
5
T
TX-EYE-MEDIAN-to- 
MAX-JITTER CHIP 
Low_Rate
Maximum time between the jitter median 
and maximum deviation from the median 
at Tx package pins
0.09
UI
5
T
TX-RISE_CHIP
,
T
TX-FALL_CHIP
D+/D- TX Output Rise/Fall Time at Tx 
package pins
50
130
ps
6
ITX-SHORT
TX Short Circuit Current Limit
50
mA
7
L
TX-
SKEWINTER_PAIR
Lane-to-Lane Output Skew at Tx package 
pins
2
UI
L
TX-
SKEWINTRA_PAIR
Lane Intra-pair Output Skew at Tx 
package pins
20
ps
T
TX-RISE_FALL
_MISMATCH
_CHIPDIFF
Lane Intra-pair Rise-fall Time Mismatch at 
Tx package pins.
5
%
8
F
TX-REJECTION-BW
Clock Jitter Rejection
Bandwidth
4
MHz
9
V
TX-AC-CM
TX AC Common Mode
Voltage
20
mV
2
C
TX
AC Coupling Capacitor 
75
200
nF
11
T
RISE
/T
FALL
Rise time/ Fall time (20%-80%)
75
-
ps
V
UNDERSHOOT
Undershoot, max
0.25 of 
full 
differenti
al 
amplitude
L
TX-
SKEWINTER_PAIR
Intra-Pair skew at source connector
0.15 UI
ps
L
TX-
SKEWINTRA_PAIR
Intra-Pair skew at source connector
1.212
ns
12
Clock duty cycle, min/average/max
40
50
60
%
TMDS differential Clock Jitter
0.25
UI
Table 111. DDI Main Transmitter AC specification (Sheet 2 of 2)
Symbol
Parameter
Min
Typ
Max
Units Notes