Intel E3815 FH8065301567411 Data Sheet

Product codes
FH8065301567411
Page of 5308
 
Intel
®
 Atom™ Processor E3800 Product Family
Datasheet
1731
15.8.889 reg_isel_irq_ctrl_reg_irq_level_not_pulse_type 
(isel_irq_ctrl_reg_irq_level_not_pulse)—Offset 90214h
Access Method
Default: 00000000h
15.8.890 reg_icache_out_sys_c_mmu_MMU_invalidate_cache_type 
(icache_out_sys_c_mmu_MMU_invalidate_cache)—Offset 
A0000h
Access Method
Default: 00000000h
Type: 
Memory Mapped I/O Register
(Size: 32 bits)
isel_irq_ctrl_reg_irq_level_not_pulse: 
ISPMMADR Type: 
PCI Configuration Register (Size: 32 bits)
ISPMMADR Reference: 
[B:0, D:3, F:0] + 10h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
un
used_reg_ir
q
_lev
el
_n
ot_pu
lse
reg_ir
q_lev
el_not_pulse
Bit 
Range
Default & 
Access
Description
31:4
0h
RW
unused_reg_irq_level_not_pulse: 
Unused
3:0
0h
RW
reg_irq_level_not_pulse: 
Indicates for each bit whether an interrupt cause is 
translated into a pulse (value='0') or into a constant level '1' (value='1') on the IRQ pin
Type: 
Memory Mapped I/O Register
(Size: 32 bits)
icache_out_sys_c_mmu_MMU_invalidate_cache: 
ISPMMADR Type: 
PCI Configuration Register (Size: 32 bits)
ISPMMADR Reference: 
[B:0, D:3, F:0] + 10h