Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
1940
Datasheet
Default: 4003h
17.5.29
PCI Power Management Control and Status (PMCS)—Offset 74h
Access Method
Default: 0008h
15
12
8
4
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
1
1
PME
_
Sup
p
ort
D2
_
S
u
p
po
rt
D1
_
S
u
p
po
rt
Au
x_Cu
rre
n
t
DS
I
RSVD
0
PM
EC
VS
Bit
Range
Default &
Access
Description
15:11
08h
RO
PME_Support:
By default with CC.SCC=01h, the default value is 00000 which indicates
no PME Support in IDE mode. When CC.SCC is not 01h in non-IDE mode, the default
value is 01000 which indicates PME# can be generated from the D3HOT state in the
SATA controller.
10
0h
RO
D2_Support:
The D2 state is not supported.
9
0h
RO
D1_Support:
The D1 state is not supported.
8:6
0h
RO
Aux_Current:
PME# from D3COLD state is not supported, therefore this field is 000b.
5
0h
RO
Device Specific Initialization (DSI):
Indicates that no device-specific initialization is
required.
4
0b
RO
RSVD0:
Reserved
3
0h
RO
PME Clock (PMEC):
Indicates that PCI clock is not required to generate PME#.
2:0
3h
RO
Version (VS):
Indicates support for Revision 1.2 of the PCI Power Management
Specification.
Type:
PCI Configuration Register
(Size: 16 bits)
PMCS:
15
12
8
4
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
PME
S
RSVD
0
PME
E
RSVD
1
NS
FR
ST
RSVD
2
PS
Bit
Range
Default &
Access
Description
15
0h
RW
PME Status (PMES):
This bit is set when a PME event is to be requested, and if this bit
is set and PMEE is set, a PME# will be generated. -Note: Whenever CC.SCC=01h either
by default or just being updated, hardware shall automatically change the attribute to
RO of 0.
14:9
0b
RO
RSVD0:
Reserved