Intel E3815 FH8065301567411 Data Sheet

Product codes
FH8065301567411
Page of 5308
Intel
®
 Atom™ Processor E3800 Product Family
1958
Datasheet
17.6.8
AHCI Data Register (DATA)—Offset 14h
This registers are only available if CC.SCC is not 01h to index into all memory registers 
defined in Memory Registers and the message buffer used for enclosure management. 
If CC.SCC is 01h, these AHCI Index Data Pair registers are not accessible and SINDEX/
SDATA register pair shall be used to index into a subset of the memory registers 
defined in (See Memory Registers for more information on which registers could be 
indexed).
Access Method
Default: 00000000h
Type: 
I/O Register
(Size: 32 bits)
DATA
LBAR Type: 
PCI Configuration Register (Size: 32 bits)
LBAR Reference: 
[B:0, D:19, F:0] + 20h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
DA
TA
Bit 
Range
Default & 
Access
Description
31:0
00000000h
RW
Data (DATA): 
This Data register is a window through which data is read or written to 
the memory mapped register pointed to by the Index register. Note that a physical 
register is not actually implemented as the data is actually stored in the memory 
mapped registers. Since this is not a physical register, the default value is the same as 
the default value of the register pointed to by Index.