Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
Datasheet
2161
18.6.52
DFT 3 (DFT3)—Offset FCh
Not for EDS
Access Method
Default: 00000000h
Bit
Range
Default &
Access
Field Name (ID): Description
31:28
0h
RO
Reserved (Rsvd):
Reserved.
Power Well:
Core
27:24
0h
RO/V
Dot Portion Process ID (DPID):
See Chap 6 for value
Power Well:
Core
23:16
00h
RO/V
Stepping ID (SID):
This field is incremented for each stepping of the part. Note that
this field can be used by software to differentiate stepping when the Revision ID may
not change. See Chap 6 for value
Power Well:
Core
15:8
0Fh
RO
Manufacturer (MNFR):
0Fh = Intel.
Power Well:
Core
7:0
00h
RO/V
Process Portion Process ID (PPID):
See Chap 6 for value
Power Well:
Core
Type:
PCI Configuration Register
(Size: 32 bits)
Offset:
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
UT
MI
LP
B
K
PA
T
RSV
D
UTMILPBKSEL_7_0
UTMILPBKP
A
TS
EL
UTMILPBKTYP
E
Bit
Range
Default &
Access
Field Name (ID): Description
31:16
0000h
RW
Loopback Pattern (UTMILPBKPAT):
2-byte pattern for loopback Note: This 2-byte
pattern will be replicated to the upper 2-byte to form the DW pattern
Power Well:
Core
15:10
00h
RO
Reserved (RSVD):
Reserved
Power Well:
Core
9:2
00h
RW
Loopback Lane Select (UTMILPBKSEL_7_0):
Port is selected if the corresponding
bit is selected Note: MSB is for UTMI+ Port13, LSB is for UTMI+ Port0
Power Well:
Core