Intel E3815 FH8065301567411 Data Sheet

Intel

®

 Atom™ Processor E3800 Product Family

2484

Datasheet

Port Link Info Register

Default: 00000000h

The definition of the fields in the PORTHLPMC register depend on the USB protocol 

supported by the port. This register is in the Aux Power well. It is only reset by platform 

hardware during a cold reset or in response to a Host Controller Reset (HCRST).

7:4

0h

RW

Host Initiated Resume Duration (HIRD) - RW. Default = '0'. System software sets 

this field to indicate to the recipient device how long the xHC will drive resume if it (the 

xHC) initiates an exit from L1. The HIRD value is encoded as follows: Value Description 

0h 50 s. (default) 1h 125 s. 2h 200 s. Fh 1.175 ms. The value of 0000b is interpreted as 

50 s. Each incrementing value up adds 75 s. to the previous value. For example, 0001b 

is 125 s, 0010b is 200s and so on. Based on this rule, the maximum value resume drive 

time is at encoding value 1111b which represents 1.2ms. Note that the HIRD field is 

used by both software and hardware controlled LPM. Refer to section 4.23.5.1.1 of xhci 

specification for more information on HIRD use. Refer to Section 4.1 of the USB2 LPM 

spec for more information on the use of the HIRD field.

3

0h

RW

Port Test Control

2:0

0h

RO

L1 Status (L1S) - RO. Default = 0. This field is used by software to determine 

whether an L1based suspend request (LMP transaction) was successful, specifically: 

Value Meaning 0 Invalid - This field shall be ignored by software. 1 Success - Port 

successfully transitioned to L1 (ACK) 2 Not Yet - Device is unable to enter L1 at this time 

(NYET) 3 Not Supported -Device does not support L1 transitions (STALL) 4 Timeout/

Error -Device failed to respond to the LPM Transaction or an error occurred 5-7 Reserved 

The value of this field is only valid when the port resides in the L0 or L1 state (PLS = '0' 

or '2'). Refer to section 4.23.5.1.1 for more information.

Memory Mapped I/O Register

(Size: 32 bits)

PCI Configuration Register (Size: 32 bits)

[B:0, D:22, F:0] + 10h

31

28

24

20

16

12

8

4

0

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

RSV

D

22

LINK_ERR

OR_COUN

T

31:16

0h

RO

reserved

15:0

0h

RO

Reg field LINK_ERROR_COUNT