Intel E3815 FH8065301567411 Data Sheet

Product codes

FH8065301567411

Intel

Atom™ Processor E3800 Product Family

Datasheet

2485

Access Method

Default: 00000000h

19.6.22

PORTSC2—Offset 430h

A host controller shall implement one or more port registers. The number of port

registers implemented by a particular instantiation of a host controller is documented in

the HCSPARAMS1 register (Section 5.3.3). Software uses this information as an input

parameter to determine how many ports need to be serviced

Access Method

Default: 000002A0h

Type:

Memory Mapped I/O Register

(Size: 32 bits)

PORTHLPMC:

[BAR] + 42Ch

BAR Type:

PCI Configuration Register (Size: 32 bits)

BAR Reference:

[B:0, D:22, F:0] + 10h

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

RSV

L1TIME

OUT

HIRD

Bit

Range

Default &

Access

Description

31:14

RSVD:

reserved

13:10

HIRDD:

Best Effort Service Latency Deep (BESLD) - RWS. Default = 0. System

software sets this field to indicate to the recipient device how long the xHC will drive

resume on an exit from U2. Refer to section 4.23.5.1.1.1 for more information on

BESLD use. The BESLD value encoding is defined in Table 13. Refer to section 5.2.6 for

information on how DBESLD may be used to establish an initial value for BESLD

9:2

L1TIMEOUT:

L1 Timeout RWS. Default = 00h. Timeout value for the L1 inactivity timer

(LPM Timer). This field shall be set to 00h by the assertion of PR to 1. Refer to section

4.23.5.1.1.1 for more information on L1 Timeout operation. The following are

permissible values: for 00h 128 s. (default). for 01h 256 s. for 02h 512 s. for 03h 768 s.

. . . for FFh 65,280 s.

1:0

HIRDM:

Host Initiated Resume Duration Mode (HIRDM) - RWS. Default = 0h. Indicates

which HIRD value should be used. The following are permissible values: for 0 Initiate L1

using BESL only on timeout. (default). for 1 Initiate L1 using BESLD on timeout. If

rejected by device, initiate L1 using BESL. for 3-2 Reserved.