Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
Datasheet
2635
19.6.253 OEVTEN—Offset CC0Ch
OTG Events Enable Register
Access Method
Default: 00000000h
1
0h
RO
SesReqSts:
Session Request Status: The core updates this bit when
OEVTEN.OTGBDevSessVldDetEvnt is set. o 1'b0: Session request due to Vbus. This
indicates that the session started due to Vbus without SRP detection by A-host. o 1'b1:
Session request due to SRP. This indicates that the session started as a result of
successful SRP detection by A-host. Note: This bit is applicable for OTG 2.0 and OTG 3.0
modes of operation.
0
0h
RO
OEVTError:
Write Behavior: oneToClear OTG Event Error: There are no errors currently
defined.
Bit
Range
Default &
Access
Description
Type:
Memory Mapped I/O Register
(Size: 32 bits)
OEVTEN:
BAR Type:
PCI Configuration Register (Size: 32 bits)
BAR Reference:
[B:0, D:22, F:0] + 10h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
RSV
D
0
O
TGC
on
IDSts
C
hn
gE
vntEn
RSV
D
1
O
TGADevBHo
stEn
dE
vntEn
O
TGADevHo
stE
vntEn
OT
G
A
D
ev
H
N
PC
h
n
g
E
vn
tE
n
O
TGAD
evS
RP
D
etE
vntEn
O
TGADevSessE
ndD
etE
vntEn
RSV
D
2
O
TGBDevBHo
stEn
dE
vntEn
OTG
B
D
ev
H
N
PC
h
n
g
E
vn
tE
n
O
TGBDevSessV
ldD
etE
vntEn
O
TGBDevVBUS
C
hn
gE
vntEn
RSV
D
3
Bit
Range
Default &
Access
Description
31:25
0h
RO
RSVD0:
reserved
24
0h
RW
OTGConIDStsChngEvntEn:
Connector ID Status Change Event
(OTGConIDStsChngEvnt) Set in both A-Dev/B-Dev Mode: This Event is generated when
there is a change in connector ID status
23:21
0h
RO
RSVD1:
reserved
20
0h
RW
OTGADevBHostEndEvntEn:
A-device B-Host End Event Enable
(OTGADevBHostEndEvntEn) When this bit is set, OEVT.OTGADevBHostEndEvnt is
enabled. Else the event is disabled.
19
0h
RW
OTGADevHostEvntEn:
A-device host event: When this bit is set,
OEVT.OTGADevHostEvnt is enabled. If not, the event is disabled
18
0h
RW
OTGADevHNPChngEvntEn:
A-Dev HNP Change EventEn: When this bit is set,
OEVT.OTGADevHNPChngEvnt is enabled. If not, the event is disabled
17
0h
RW
OTGADevSRPDetEvntEn:
SRP Detect Event Enable: When this bit is set,
OEVT.OTGADevSRPDetEvnt is enabled. If not, the event is disabled