Intel E3815 FH8065301567411 Data Sheet

Product codes
FH8065301567411
Page of 5308
Intel
®
 Atom™ Processor E3800 Product Family
2726
Datasheet
20.6.31
IR—Offset 64h
Immediate Response
Access Method
Default: 00000000h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
IMMEDIA
T
E_COMMAND_WRITE
Bit 
Range
Default & 
Access
Description
31:0
0h
RW
IMMEDIATE_COMMAND_WRITE: 
The command to be sent to the codec via the 
Immediate Command mechanism is written to this register. The command stored in this 
register is sent out over the link during the next available frame after a 1 is written to 
the ICB bit.
Type: 
Memory Mapped I/O Register
(Size: 32 bits)
IR: 
AZLBAR Type: 
PCI Configuration Register (Size: 32 bits)
AZLBAR Reference: 
[B:0, D:27, F:0] + 10h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
IMME
DIA
T
E_RE
SP
ONSE
_REA
D
Bit 
Range
Default & 
Access
Description
31:0
0h
RO
IMMEDIATE_RESPONSE_READ: 
This register contains the response received from a 
codec resulting from a command sent via the Immediate Command mechanism. If 
multiple codecs responded in the same frame there is no guarantee as to which 
response will be latched. Therefore broadcast type commands must not be issued via 
the Immediate Command mechanism.