Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
Datasheet
2749
20.6.57
ISD2FIFOW—Offset CEh
Input Stream Descriptor 2 FIFO Eviction Watermark
Access Method
Default: 0004h
20.6.58
ISD2FIFOS—Offset D0h
Input Stream Descriptor 2 FIFO Size
15
12
8
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
RE
S
E
R
V
E
D
0
LAST
_V
ALID_INDEX
Bit
Range
Default &
Access
Description
15:8
00h
RO
RESERVED0:
reserved
7:0
00h
RW
LAST_VALID_INDEX:
The value written to this register indicates the index for the last
valid Buffer Descriptor in the BDL. After the controller has processed this descriptor it
will wrap back to the first descriptor in the list and continue processing. LVI must be at
least 1 i.e. there must be at least two valid entries in the buffer descriptor list before
DMA operations can begin. This value should only be modified when the RUN bit is 0
Type:
Memory Mapped I/O Register
(Size: 16 bits)
ISD2FIFOW:
AZLBAR Type:
PCI Configuration Register (Size: 32 bits)
AZLBAR Reference:
[B:0, D:27, F:0] + 10h
15
12
8
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
RE
SE
RVED0
FIFO
_
W
A
T
E
R
MARK
Bit
Range
Default &
Access
Description
15:3
0000h
RO
RESERVED0:
reserved
2:0
04h
RO
FIFO_WATERMARK:
Indicates the minimum number of bytes accumulated in the FIFO
before the controller will start an eviction of data. The HD Audio controller hardwires the
FIFO Watermark either 32B or 64B based on the following. For input streams the FIFOW
value is determined by the EM3.ISRWS SEM3.ISRWS field.