Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
282
Datasheet
12.3.1
DRP—Offset 0h
DRAM Rank Population
Access Method
Default: 00000000h
E3–E3h
00000000h
E8–E8h
00000000h
E9–E9h
00000000h
EA–EAh
00000000h
Table 156.
Summary of Memory Controller Message Bus Registers—Port 0x01
Offset
Register Name (Register Symbol)
Default
Value
Type:
Message Bus Register
(Size: 32 bits)
Offset:
Op Codes:
h - Read, h - Write
h - Read, h - Write
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Rs
vd_31_24_DRP
EN
LP
D
D
R
3
DRAMTYPE
DIMM1MIRR
DIMM0MIRR
Rsv
d
_19_DRP
CK
EC
OP
Y
RANKRE
MAP
DIMMFLIP
Rsv
d
_15_DRP
RSIE
N
Rsv
d
_13_DRP
D
IMMDDE
N1
DIMM
D
W
ID1
Rsvd_8_DRP
D
IMMDDE
N0
DIMM
D
W
ID0
RKE
N
3
RKE
N
2
RKE
N
1
RKE
N
0
Bit
Range
Default &
Access
Field Name (ID): Description
31:24
0h
RO
Rsvd_31_24_DRP:
Reserved
23
0h
RW/P/L
ENLPDDR3:
Enable LPDDR3 Mode 0 - LPDDR2 1 - LPDDR3 Note: This bit is functional
only when DRP.DRAMTYPE is set to LPDDR2
22
0h
RW/P/L
DRAMTYPE:
DRAM Type 0 - DDR3 1 - LPDDR2
21
0h
RW/P/L
DIMM1MIRR:
Address mapping to DIMM1 is mirrored. BIOS writes value defined in
SPD Byte 63. Used as indication to Punit to flip MRS opcode to 2nd rank on DIMM1. This
bit has no functional impact on Dunit. 0 - Standard 1 - Mirrored
20
0h
RW/P/L
DIMM0MIRR:
Address mapping to DIMM0 is mirrored. BIOS writes value defined in
SPD Byte 63. Used as indication to Punit to flip MRS opcode to 2nd rank on DIMM0. This
bit has no functional impact on Dunit. 0 - Standard 1 - Mirrored
19
0h
RO
Rsvd_19_DRP:
Reserved
18
0h
RW/P/L
CKECOPY:
Used for doubling CKE. 0 - no CKE copy 1 - Copy CKE[0] to CKE[1] and
CKE[2] to CKE[3] Note: CKE to DDRIO also depends upon RANKREMAP and state of CA
Training.
17
0h
RW/P/L
RANKREMAP:
Enables mapping logical rank to physical rank. 0 - no rank remap 1 -
rank is remapped If (rank[0] is enabled) Map rank[1] to rank[2] Else (If rank[0] is
disabled) Map rank[3:2] to rank[1:0]