Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
Datasheet
471
14.10.22 GMBUS1—Offset 5104h
GMBUS Command and Status gmbus command and status (gmbus_register.v
reg_gmbus1)
Access Method
Default: 00000000h
10:8
0b
RW
GMBUS_RATE_SELECT:
These two bits select the rate that the GMBUS will run at. It
also defines the AC timing parameters used. It should only be changed when between
transfers when the GMBUS is idle.
1xx = Reserved.
000 = 100 KHz
001 = 50 KHz
010 = 400 KHz
011 = 1 MHz for SDVO
7:3
0b
RW
RESERVED_2:
Reserved.
2:0
0b
RW
PIN_PAIR_SELECT:
This field selects an GMBUS pin pair for use in the GMBUS
communication. Use the table above to determine which pin pairs are available for a
particular device and the intended function of that pin pair. Note that it is not a straight
forward mapping of port numbers to pair select numbers.
000 = None (disabled)
001 = MIPI I2C use
010 = Dedicated Analog Monitor DDC Pins (DDC1DATA, DDC1CLK)
011 = Reserved
100 = DP/HDMI port C Use [DevCTG]
101 = sDVO/HDMI Use
110 = Reserved
111 = D connector control signals
Bit
Range
Default &
Access
Field Name (ID): Description
Type:
Memory Mapped I/O Register
(Size: 32 bits)
Offset:
GTTMMADR_LSB Type:
PCI Configuration Register (Size: 32
bits)
GTTMMADR_LSB Reference:
GTTMMADR_LSB Reference:
[B:0, D:2, F:0] + 10h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
S
O
FT
W
A
RE
_C
LE
AR_INTE
RRUP
T
_
S
W_C
LR_INT
SOF
T
W
A
RE_RE
A
D
Y
_SW_RD
Y
EN
AB
LE
_
T
IM
EO
UT
_
E
NT
RE
SERV
ED
BUS
_
CY
CLE
_
SE
LE
CT
TOT
A
L_
B
Y
T
E
_
C
O
U
N
T
_8_BIT_GM
B
US_SLA
VE_RE
G
ISTER_INDE
X_INDEX
_7_BIT_G
MBUS_SLA
VE_AD
D
RES
S
_S
ADDR
S
LA
V
E_
DIRE
CTIO
N_BIT