Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
Datasheet
473
14.10.23 GMBUS2—Offset 5108h
GMBUS Status Register gmbus status (gmbus_register.v reg_gmbus2)
Access Method
Default: 00000800h
7:1
0b
RW
_7_BIT_GMBUS_SLAVE_ADDRESS_SADDR:
When a GMBUS cycle is to be
generated using the Bus Cycle Select field, this field specifies the value of the slave
address that is to be sent out.
For use with 10-bit slave address devices, set this value to 11110XXb (where the last
two bits (xx) are the two MSBs of the 10-bit address) and the slave direction bit to a
write. This is followed by the first data byte being the 8 LSBs of the 10-bit slave
address.
Special Slave Addresses
0000 000R = General Call Address
0000 000W = Start byte
0000 001x = CBUS Address
0000 010x = Reserved
0000 011x = Reserved
0000 1xxx = Reserved
1111 1xxx = Reserved
1111 0xxx = 10-Bit addressing
0
0b
RW
SLAVE_DIRECTION_BIT:
When a GMBUS cycle is to be generated based on the Bus
Cycle Select, this bit determines if the operation will be a read or a write. A read
operation with the index enabled will perform a write with just the index followed by a
re-start and a read.
1 = Indicates that a Read from the slave device operation is to be performed.
0 = Indicates that a Write to slave device operation is to be performed.
Bit
Range
Default &
Access
Field Name (ID): Description
Type:
Memory Mapped I/O Register
(Size: 32 bits)
Offset:
GTTMMADR_LSB Type:
PCI Configuration Register (Size: 32
bits)
GTTMMADR_LSB Reference:
GTTMMADR_LSB Reference:
[B:0, D:2, F:0] + 10h