Intel E3815 FH8065301567411 Data Sheet

Product codes
FH8065301567411
Page of 5308
Intel
®
 Atom™ Processor E3800 Product Family
474
Datasheet
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0
RE
SE
RVED
INUSE
HARD
W
A
R
E
_W
AIT_PHASE
_
HW_W
AIT_PHASE_READ_ONL
Y
SLA
V
E
_
ST
ALL
_
T
IME
OU
T_ER
ROR_REA
D
_ONL
Y
GMBU
S
_
INTERRUPT_ST
A
TUS_REA
D
_ONL
Y
HARD
W
A
RE
_READ
Y
_HW_RD
Y_REA
D
_ONL
Y
NAK
_
IN
D
IC
A
TO
R_REA
D
_ONL
Y
G
M
BU
S_AC
TIV
E
_G
A_REA
D
_ONL
Y
CURRENT_BYT
E_COUNT_REA
D
_ONL
Y
Bit 
Range
Default & 
Access
Field Name (ID): Description
31:16
0b
RW
RESERVED: 
Reserved.
15
0b
RW/1C
INUSE: 
0 = read operation that contains a zero in this bit position indicates that the 
GMBUS engine is now acquired and the subsequent reads of this register will now have 
this bit set. Writing a 0 to this bit has no effect. 
1 = read operation that contains a one for this bit indicates that the GMBUS is currently 
allocated to someone else and In use . Once set, a write of a 1 to this bit indicates that 
the software has relinquished the GMBUS resource and will reset the value of this bit to 
a 0. 
Software wishing to arbitrate for the GMBUS resource can poll this bit until it reads a 
zero and will then own usage of the GMBUS controller. This bit has no effect on the 
hardware, and is only used as semaphore among various independent software threads 
that don t know how to synchronize their use of this resource that may need to use the 
GMBUS logic. Writing a one to this bit is software s indication that the software use of 
this resource is now terminated and it is available for other clients.  
AccessType: One to clear
14
0b
RO
HARDWARE_WAIT_PHASE_HW_WAIT_PHASE_READ_ONLY: 
0 = The GMBUS 
engine is not in a wait phase. 
1 = Set when GMBUS engine is in wait phase. Wait phase is entered at the end of the 
current transaction when that transaction is selected not to terminate with a STOP.  
Once in a WAIT_PHASE, the software can now choose to generate a STOP cycle or a 
repeated start (RESTART) cycle followed by another GMBUS transaction on the GMBUS. 
AccessType: Read Only
13
0b
RO
SLAVE_STALL_TIMEOUT_ERROR_READ_ONLY: 
This bit indicates that a slave stall 
timeout has occurred. It is tied to the Enable Timeout (ENT) bit. 
0 = No slave timeout has occurred. 
1 = A slave acknowledge timeout has occurred  
AccessType: Read Only