Intel E3815 FH8065301567411 Data Sheet
Product codes
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
594
Datasheet
14.10.157 BCLRPAT_A—Offset 60020h
Pipe A Border Color Pattern Register
Access Method
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
RE
SE
RVED
PIPE_A_HORIZ
ONT
A
L_SOU
R
CE
_
IMAG
E
_SIZE
RESE
RVED
_1
P
IPE_A_VER
TICAL_SOU
R
CE
_
IMAG
E
_SIZE
Bit
Range
Default &
Access
Field Name (ID): Description
31:28
0b
RW
RESERVED:
Write as zero
27:16
0b
RW
PIPE_A_HORIZONTAL_SOURCE_IMAGE_SIZE:
This 12-bit field specifies Horizontal
source image size up to 4096. This determines the size of the image created by the
display planes sent to the blender. The value programmed should be the source image
size minus one. The actual source size must be two times the programmed value in the
pixel multiply mode.
It must represent a size that is a multiple of two (even numbers) when driving the LVDS
port in two channel mode. This implies that for this mode, the value programmed will
always be an odd number.
Except in the case of panel fitting internal or in an external device, this register field
would be programmed to a value identical to the horizontal active. This is the only
register of the timing registers that is allowed to be programmed while the pipe is
enabled.
15:12
0b
RW
RESERVED_1:
Write as zero
11:0
0b
RW
PIPE_A_VERTICAL_SOURCE_IMAGE_SIZE:
This 12-bit field specifies the vertical
source image size up to 4096 lines. This determines the size of the image created by the
display planes sent to the blender. The value programmed should be the source image
size minus one.
Note that the actual number of lines needs to be at least twice the planes programmed
value when in the pixel multiply mode.
Except in the case of panel fitting internal or in an external device, this register field
would be programmed to a value identical to the vertical active.
For interlaced display modes, hardware automatically divides this number by 2 to get
the vertical source image size in each field.
Type:
Memory Mapped I/O Register
(Size: 32 bits)
Offset:
GTTMMADR_LSB Type:
PCI Configuration Register (Size: 32
bits)
GTTMMADR_LSB Reference:
GTTMMADR_LSB Reference:
[B:0, D:2, F:0] + 10h