Intel E3815 FH8065301567411 Data Sheet

Intel

Product codes

FH8065301567411

Intel

®

Atom™ Processor E3800 Product Family

Datasheet

643

72298–7229Bh

4

“SPBKEYMSK—Offset 72298h” on page 969

00000000h

7229C–7229Fh

4

“SPBSURF—Offset 7229Ch” on page 969

00000000h

722A0–722A3h

4

“SPBKEYMAXVAL—Offset 722A0h” on page 971

00000000h

722A4–722A7h

4

“SPBTILEOFF—Offset 722A4h” on page 972

00000000h

722A8–722ABh

4

“SPBCONTALPHA—Offset 722A8h” on page 973

00000000h

722AC–722AFh

4

“SPBLIVESURF—Offset 722ACh” on page 974

00000000h

722D0–722D3h

4

“SPBCLRC0—Offset 722D0h” on page 975

01000000h

722D4–722D7h

4

“SPBCLRC1—Offset 722D4h” on page 976

00000080h

722E0–722E3h

4

“SPBGAMC5—Offset 722E0h” on page 977

00C0C0C0h

722E4–722E7h

4

“SPBGAMC4—Offset 722E4h” on page 978

00808080h

722E8–722EBh

4

“SPBGAMC3—Offset 722E8h” on page 978

00404040h

722EC–722EFh

4

“SPBGAMC2—Offset 722ECh” on page 979

00202020h

722F0–722F3h

4

“SPBGAMC1—Offset 722F0h” on page 979

00101010h

722F4–722F7h

4

“SPBGAMC0—Offset 722F4h” on page 980

00080808h

72380–72383h

4

“SPCCNTR—Offset 72380h” on page 981

00000000h

72384–72387h

4

“SPCLINOFF—Offset 72384h” on page 983

00000000h

72388–7238Bh

4

“SPCSTRIDE—Offset 72388h” on page 984

00000000h

7238C–7238Fh

4

“SPCPOS—Offset 7238Ch” on page 985

00000000h

72390–72393h

4

“SPCSIZE—Offset 72390h” on page 985

00000000h

72394–72397h

4

“SPCKEYMINVAL—Offset 72394h” on page 986

00000000h

72398–7239Bh

4

“SPCKEYMSK—Offset 72398h” on page 987

00000000h

7239C–7239Fh

4

“SPCSURF—Offset 7239Ch” on page 987

00000000h

723A0–723A3h

4

“SPCKEYMAXVAL—Offset 723A0h” on page 989

00000000h

723A4–723A7h

4

“SPCTILEOFF—Offset 723A4h” on page 990

00000000h

723A8–723ABh

4

“SPCCONTALPHA—Offset 723A8h” on page 991

00000000h

723AC–723AFh

4

“SPCLIVESURF—Offset 723ACh” on page 992

00000000h

723D0–723D3h

4

“SPCCLRC0—Offset 723D0h” on page 993

01000000h

723D4–723D7h

4

“SPCCLRC1—Offset 723D4h” on page 994

00000080h

723E0–723E3h

4

“SPCGAMC5—Offset 723E0h” on page 995

00C0C0C0h

723E4–723E7h

4

“SPCGAMC4—Offset 723E4h” on page 996

00808080h

723E8–723EBh

4

“SPCGAMC3—Offset 723E8h” on page 996

00404040h

723EC–723EFh

4

“SPCGAMC2—Offset 723ECh” on page 997

00202020h

723F0–723F3h

4

“SPCGAMC1—Offset 723F0h” on page 997

00101010h

723F4–723F7h

4

“SPCGAMC0—Offset 723F4h” on page 998

00080808h

72414–72417h

4

“SWF30—Offset 72414h” on page 999

00000000h

72418–7241Bh

4

“SWF31—Offset 72418h” on page 999

00000000h

7241C–7241Fh

4

“SWF32—Offset 7241Ch” on page 1000

00000000h

72480–72483h

4

“SPDCNTR—Offset 72480h” on page 1000

00000000h

72484–72487h

4

“SPDLINOFF—Offset 72484h” on page 1003

00000000h

Table 171.

Summary of Display Memory Mapped I/O Registers—GTTMMADR_LSB

Offset

Size

(Bytes)

Register Name (Register Symbol)

Default

Value