Intel E3815 FH8065301567411 Data Sheet

Intel

®

 Atom™ Processor E3800 Product Family

88

Datasheet

NOTE:S0ix is not supported for Bay Trail-M/D and Bay Trail-I.

While executing code, Enhanced Intel

®

 SpeedStep

®

 Technology optimizes the 

processor’s frequency and core voltage based on workload. Each frequency and voltage 
operating point is defined by ACPI as a P-state. When the processor is not executing 
code, it is idle. A low-power idle state is defined by ACPI as a C-state. In general, lower 
power C-states have longer entry and exit latencies.

The following are the key features of Enhanced Intel

®

 SpeedStep

®

 Technology:

•

Applicable to Processor Core Voltage and Graphic Core Voltage

•

Multiple frequency and voltage points for optimal performance and power 
efficiency. These operating points are known as P-states.

•

Frequency selection is software controlled by writing to processor MSRs. The 
voltage is optimized based on the selected frequency:

— If the target frequency is higher than the current frequency, Core_VCC_S3 is 

ramped up slowly to an optimized voltage. This voltage is signaled by the SVID 
signals to the voltage regulator. Once the voltage is established, the PLL locks 
on to the target frequency.

— If the target frequency is lower than the current frequency, the PLL locks to the 

target frequency, then transitions to a lower voltage by signaling the target 
voltage on the SVID signals.

•

The processor controls voltage ramp rates by requesting appropriate ramp rates 
from an external SVID controller.

•

Because there is low transition latency between P-states, a significant number of 
transitions per second are possible.

D0

S0

C0

Full On, Displaying

D0

S0

C1

Auto-Halt, Displaying

D0

S0

C6

Deep Sleep, Display Off

D3

S0

Any

Not Displaying

D3

S3

Not Displaying
Graphics Core power off.

D3

S4

Not Displaying
Suspend to disk
Core power off