SMSC LAN9420i Manual De Usuario

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Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface
Datasheet
Revision 1.22 (09-25-08)
150
SMSC LAN9420/LAN9420i
DATASHEET
 lists the standard PCI header registers that are supported. Registers whose initial values
for Subsystem Vendor ID and Subsystem Device ID, are configured from the EEPROM are indicated
by ‘YES’ in the “EPROM CONFIGURABLE” column.
Note 4.7
Default value is dependent on device revision.
Note 4.8
BAR3’s read back value is FFFFFC00h after writing FFFFFFFFh. BAR4’s read back value
is FFFFFF01h after writing FFFFFFFFh.
Note 4.9
The Subsystem Vendor ID and Subsystem Device ID can be configured by the serial
EEPROM. if no EEPROM is connected to LAN9420/LAN9420i, then the default values in
the table are used.
Table 4.10 Standard PCI Header Registers Supported
CONFIGURATION 
SPACE OFFSET
REGISTER NAME
READ/ 
WRITE
DEFAULT
EEPROM 
CONFIGURABLE
00h - 01h
Vendor ID
RO
1055h
02h - 03h
Device ID
RO
E420h
04h - 05h
Command
R/W
00h
06h - 07h
Status
RO, R/WC
0410h
08h
Revision ID
RO
09h - 0Bh
Class Code
RO
020000h
0Ch
Cache Line Size
R/W
00h
0Dh
Latency Timer
R/W
00h
0Eh
Header Type
RO
00h
0F - 1Bh
RESERVED
RO
1Ch - 1Fh
BAR 3 (
(For NP-Mem mapped 1Kbyte)
R/W
00000000h
(FFFFFC00h)
20h - 23h
BAR 4 (
(For I/O mapped 256byte)
R/W
0000001h
(FFFFFF01h)
24h - 2Bh
RESERVED
RO
2Ch - 2Dh
Subsystem Vendor ID (SSVID)
(
RO
1055h
YES
2EH - 2Fh
Subsystem Device ID (SSID)
(
RO
9420h
YES
30h - 33h
RESERVED
RO
34h
Capabilities Pointer
RO
78h
35h - 3Bh
RESERVED
RO
3Ch
Interrupt Line
R/W
00h
3Dh
Interrupt Pin
RO
01h
3Eh
Min_Gnt
RO
02h
3Fh
Max_Lat
RO
04h